arxiv
PublishedJune 16, 2026 at 4:00 AM
▲bullish
ESBMC-PLC: Formal Verification of IEC 61131-3 Ladder Diagram Programs Using SMT-Based Model Checking
Publisher summary· verbatim
arXiv:2606.15461v1 Announce Type: new Abstract: PLCs execute safety-critical programs across industrial sectors. The dominant PLC notation, ladder diagram (LD) per IEC 61131-3, remains absent from formal verification: SMT-based model checkers cannot process LD's rung-and-coil graphics. This paper pr
Stay posted· Newsletter
A 5-min weekly brief — top movers, price watch, story of the week.
Discussion
No replies yet. Be first.
Related coverage
More from ARXIV
arxivPlanning and Scheduling Business Processes under Control-Flow Uncertainty15harxivSIM: Subspace Interaction-based Method for Token-Level Text Anomaly Detection15harxivWAPP: Safe Learning of Positive Security WAF Policies from Live Traffic15harxivPAN: A World Model for General, Actionable, and Long-Horizon World Simulation15hThe Bubble Brief
WEEKLYRead formal-verification insights every Tuesday — top movers, new releases, story of the week.
Originally published on arxiv ↗